Engineering Quantum Error Correction: How our no-code low power compression unlocks fault tolerant operations

In June, we gave you a glimpse into one of our patents and how it reduced noise to boost the efficiency and scalability of our Quantum Error Correction Stack.

Now, we are delighted to tell you that Riverlane’s inventiveness does not stop there with more news for our control system: Deltaflow.Control.

In our previous post, we introduced the wiring/bandwidth issue, explaining how the QPU is connected to the classical interface using a limited, fixed number of wires, resulting in a bandwidth problem between these classical and quantum systems.

Then, we presented our solution to minimise noise over the transmission wires where the digital control signals are compressed at the classical interface. These compressed control signals are then split into sub-streams and the sub-streams are transmitted to the QPU in a staggered configuration.

Noise reduction allows for more/faster electronics to operate in the quantum control system, with no increase in the total dissipated energy. This leads to more capable quantum stacks, that can control more qubits, correct more errors, or a combination of the two. 

The good news is that the invention was part of a larger idea with a second UK patent just granted.

The image in the previous post (Figure 1) somehow anticipated this idea, namely: what if on top of transmitting the classical signals in a smart way we also compress them?

Figure 1: Diagram from our earlier patent, which covers a method for transmitting control signals from a classical computing interface to a QPU

Compression matters

Compression techniques exploit redundant information in the data to generate a representation that requires less data to be transmitted.

For example, we could store/transmit the sequence of eight bits, ‘00010000’, as the ‘position’ of the ‘1’ digit and just use three bits. This “saves” us from transmitting 5 bits.

The less data we send, the less bandwidth we use, and the less power we consume.

To understand the benefits that compression brings, and the importance of doing it in an energy efficient way, we need to understand the full data chain.

In a quantum computing stack, as quantum circuits get converted to low-level signals, the associated amount of data grows. Whilst one quantum gate can be stored in a few bytes (e.g. in OpenQASM2.0 then a Hadamard gate becomes the string: “h q[0];”), the associated low-level signals might easily take kilobytes or more.

Unfortunately, moving data requires energy and the more energy that is used to move data then the less is available to control the qubits.

As shown in Figure 2, this happens in the parts of the quantum stack where we want to dissipate as little energy as possible.

For example, the dilution fridges used by silicon/superconducting qubits are constructed in stages, with the colder stages less capable of dissipating heat. By compressing the data before transmitting and decompressing it afterwards, we could reduce the noise radiated in the system and reduce the generated heat.

Potentially, however, the compression/decompression process could introduce noise and, therefore, finding the right balance between the heat generating by compressing vs transmitting data is key.  

Figure 2: What happens in the parts of the quantum stack where we want to dissipate as little energy as possible.

A universal solution might not be possible. Let’s try to see why by looking at three different scenarios:

1. We need to send low-level control information into a colder cryogenic stage (e.g. from the 3K to the 10mK stage). We can afford to consume more energy when identifying redundancy in the incoming data, but we need to minimise energy spent in restoring it back to its former shape.
2. We need to transfer information out a colder cryogenic stage (e.g. from 10mK to 3K stage). Compression needs to be power efficient: decompression can exploit models and additional information to restore partial data.
3. We want to transfer information within components in the cryogenic system (e.g. within the 3K stage). The total energy budget needs to be carefully shared between compression and decompression.

It should be clear that one solution won’t fit all the problems that we have identified above. Each system will likely need a bespoke solution. Our invention can guide this process by identifying the optimal compression/decompression scheme in just four steps:

1. Load the expected data patterns into our engine. One way to generate the data pattern is to set the distribution of quantum instructions to be executed and then map the signals that need transmission.
2. Consider the input properties of the digital logic used in the system and the power budgets. A non-exhaustive list might include the number of transmission wires, memory active and passive consumption, flip-flop toggle energy, clocking tree energy dissipation. Table 1 uses open-source data to elaborate on this concept.
3. Set the power budgets for compression and decompression phases.
4. Get the result. Multiple compression/decompression schemes are analysed, and their power budgets estimated and presented to the user.

	Compression	Decompression
Single bit operation	1 nW	10 fW
Number of wires	20
Transmit/receive 1 bit	20 nW	100 fW
Thermal budget	0.1 W (@3K)	0.1 uW  (@10mK)

Table 1: Example of inputs to our invention. Representative scenario where a 28nm CMOS at 3K needs to transmit data to an RSFQ device operating at 10mK. Values are for reference only.

This invention from the team at Riverlane leapfrogs the design phase by tackling one of the hardest-problems in quantum control in a no-code fashion.

This facilitates the development of scalable fault-tolerant universal quantum computers with thousands or more physical qubits in two ways: by overall reducing the noise of the system and by tailoring it around fault tolerant operations – where fault tolerance is the end goal of quantum computing, allowing us to unlock a range of real-world, useful applications.

At Riverlane, our control system is designed to help quantum hardware labs accelerate their research and get the best out of their qubits. We work in close partnership with the world’s leading labs, global governments and industry partners. If you’d like to find out more, please contact us here.